Information for file /usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/DLS_1ton.core.h
| Name | /usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/DLS_1ton.core.h |
|---|---|
| Digest (sha256) | 933e3339af29ccea2a2eda1c322179fe5e68df5f18fa6d713af2709d9c98df8e |
| Size | 1.59 KB |
| Modification time | Sun, 06 Nov 2022 10:48:34 UTC |
| User | root |
| Group | root |
| Mode | -rw-r--r-- |
| Flags | |
| RPM | qucs-debugsource-0.0.20~rc2-2.fc37.riscv64.rpm |
