Information for file /usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/fa1b.core.h
| Name | /usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/fa1b.core.h |
|---|---|
| Digest (sha256) | 3b89f464bb5215cf65675fd095dc6686698ec87da27adb6dd74a4d2b29f5010e |
| Size | 1.56 KB |
| Modification time | Sun, 06 Nov 2022 10:49:40 UTC |
| User | root |
| Group | root |
| Mode | -rw-r--r-- |
| Flags | |
| RPM | qucs-debugsource-0.0.20~rc2-2.fc37.riscv64.rpm |
