Thu, 27 Jun 2024 10:03:53 UTC | login

Information for file /usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/vcresistor.defs.h

Name/usr/src/debug/qucs-0.0.20~rc2-2.fc37.riscv64/qucs-core/src/components/verilog/vcresistor.defs.h
Digest (sha256)c1a293a6761c7d8d608b5361ade04c0031af9b93daf9c2a1604f6e921ca1aec3
Size790.00 B
Modification timeSun, 06 Nov 2022 10:51:04 UTC
Userroot
Grouproot
Mode-rw-r--r--
Flags
RPMqucs-debugsource-0.0.20~rc2-2.fc37.riscv64.rpm