Mon, 30 Sep 2024 17:32:15 UTC | login

Information for file usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch

Nameusb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
Digest (sha256)e98eafdb0c54570dc812aa293d1695fc31aa68765f3eb40bfef75061841d1dc2
Size1.58 KB
Modification timeMon, 18 Feb 2019 11:28:35 UTC
Usermockbuild
Groupmock
Mode-rw-r--r--
Flags
RPMkernel-5.0.0-0.rc7.git0.1.0.riscv64.fc30.src.rpm