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Information for RPM iverilog-10_2-2.fc29.riscv64.rpm

ID123536
Nameiverilog
Version10_2
Release2.fc29
Epoch
Archriscv64
SummaryIcarus Verilog is a verilog compiler and simulator
DescriptionIcarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
Build Time2018-06-07 21:22:00 GMT
Size1.92 MB
7bfebb814e64ab05b6f2c07ef631d15b
LicenseGPLv2
Buildrootf29-build-8814-3697
Provides
iverilog = 10_2-2.fc29
iverilog(riscv-64) = 10_2-2.fc29
Obsoletes No Obsoletes
Conflicts No Conflicts
Requires
/bin/sh
ld-linux-riscv64-lp64d.so.1()(64bit)
ld-linux-riscv64-lp64d.so.1(GLIBC_2.27)(64bit)
libbz2.so.1()(64bit)
libc.so.6()(64bit)
libc.so.6(GLIBC_2.27)(64bit)
libdl.so.2()(64bit)
libdl.so.2(GLIBC_2.27)(64bit)
libgcc_s.so.1()(64bit)
libgcc_s.so.1(GCC_3.0)(64bit)
libgcc_s.so.1(GCC_3.4)(64bit)
libhistory.so.7()(64bit)
libm.so.6()(64bit)
libm.so.6(GLIBC_2.27)(64bit)
libpthread.so.0()(64bit)
libpthread.so.0(GLIBC_2.27)(64bit)
libreadline.so.7()(64bit)
libstdc++.so.6()(64bit)
libstdc++.so.6(CXXABI_1.3)(64bit)
libstdc++.so.6(CXXABI_1.3.8)(64bit)
libstdc++.so.6(CXXABI_1.3.9)(64bit)
libstdc++.so.6(GLIBCXX_3.4)(64bit)
libstdc++.so.6(GLIBCXX_3.4.11)(64bit)
libstdc++.so.6(GLIBCXX_3.4.15)(64bit)
libstdc++.so.6(GLIBCXX_3.4.20)(64bit)
libstdc++.so.6(GLIBCXX_3.4.21)(64bit)
libstdc++.so.6(GLIBCXX_3.4.9)(64bit)
libtinfo.so.6()(64bit)
libz.so.1()(64bit)
libz.so.1(ZLIB_1.2.0)(64bit)
rpmlib(CompressedFileNames) <= 3.0.4-1
rpmlib(FileDigests) <= 4.6.0-1
rpmlib(PayloadFilesHavePrefix) <= 4.0-1
rpmlib(PayloadIsXz) <= 5.2-1
rtld(GNU_HASH)
Recommends No Recommends
Suggests No Suggests
Supplements No Supplements
Enhances No Enhances
Files
Page:
1 through 50 of 127 >>>
Name Size descending sort
/usr/lib64/ivl/ivl2.23 MB
/usr/bin/vvp1.13 MB
/usr/lib64/ivl/vhdlpp448.06 KB
/usr/lib64/ivl/system.vpi361.87 KB
/usr/lib64/libveriuser.a298.55 KB
/usr/lib64/ivl/vhdl.tgt252.69 KB
/usr/lib64/ivl/vvp.tgt152.48 KB
/usr/lib64/ivl/vlog95.tgt132.45 KB
/usr/include/ivl_target.h92.06 KB
/usr/lib64/ivl/stub.tgt71.03 KB
/usr/lib64/ivl/pcb.tgt62.42 KB
/usr/lib64/ivl/cadpli.vpl54.84 KB
/usr/lib64/ivl/ivlpp53.47 KB
/usr/share/doc/iverilog/examples/des.v46.81 KB
/usr/bin/iverilog46.01 KB
/usr/lib64/ivl/blif.tgt43.05 KB
/usr/lib64/ivl/sizer.tgt24.12 KB
/usr/include/vpi_user.h21.16 KB
/usr/lib64/ivl/v2009.vpi20.12 KB
/usr/share/doc/iverilog/ieee1364-notes.txt19.38 KB
/usr/share/licenses/iverilog/COPYING17.67 KB
/usr/share/doc/iverilog/README.txt17.26 KB
/usr/lib64/ivl/v2005_math.vpi15.93 KB
/usr/share/doc/iverilog/netlist.txt13.33 KB
/usr/share/doc/iverilog/examples/sqrt-virtex.v11.76 KB
/usr/lib64/ivl/va_math.vpi11.30 KB
/usr/include/veriuser.h11.30 KB
/usr/lib64/ivl/vhdl_sys.vpi11.16 KB
/usr/share/man/man1/iverilog.1.gz7.96 KB
/usr/include/acc_user.h7.48 KB
/usr/share/doc/iverilog/BUGS.txt7.38 KB
/usr/lib64/ivl/vpi_debug.vpi7.02 KB
/usr/lib64/ivl/null.tgt6.82 KB
/usr/share/doc/iverilog/fpga.txt6.17 KB
/usr/share/doc/iverilog/examples/pal_reg.v4.27 KB
/usr/share/doc/iverilog/examples/sqrt.vl3.93 KB
/usr/share/doc/iverilog/examples/show_vcd.vl3.82 KB
/usr/share/doc/iverilog/xilinx-hint.txt3.74 KB
/usr/share/doc/iverilog/va_math.txt3.72 KB
/usr/share/doc/iverilog/examples/xnf_add.vl3.65 KB
/usr/bin/iverilog-vpi3.64 KB
/usr/share/doc/iverilog/examples/clbff.v3.30 KB
/usr/share/man/man1/vvp.1.gz3.05 KB
/usr/share/doc/iverilog/extensions.txt3.02 KB
/usr/share/doc/iverilog/QUICK_START.txt2.95 KB
/usr/share/doc/iverilog/attributes.txt2.84 KB
/usr/share/doc/iverilog/examples/outff.v2.76 KB
/usr/include/_pli_types.h2.45 KB
/usr/share/doc/iverilog/swift.txt2.34 KB
/usr/include/sv_vpi_user.h2.10 KB
Component of No Buildroots