Information for RPM abc-1.01-13.hg20160905.fc28.src.rpm
ID | 321 | ||||||||||||||
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Name | abc | ||||||||||||||
Version | 1.01 | ||||||||||||||
Release | 13.hg20160905.fc28 | ||||||||||||||
Epoch | |||||||||||||||
Arch | src | ||||||||||||||
Summary | Sequential logic synthesis and formal verification | ||||||||||||||
Description | ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a toolbox rather than a complete tool. | ||||||||||||||
Build Time | 2018-02-28 06:24:35 GMT | ||||||||||||||
Size | 5.75 MB | ||||||||||||||
132f302c6ca7b269d4681cdf30f7ca80 | |||||||||||||||
License | MIT | ||||||||||||||
Provides | No Provides | ||||||||||||||
Obsoletes | No Obsoletes | ||||||||||||||
Conflicts | No Conflicts | ||||||||||||||
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Recommends | No Recommends | ||||||||||||||
Suggests | No Suggests | ||||||||||||||
Supplements | No Supplements | ||||||||||||||
Enhances | No Enhances | ||||||||||||||
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Component of | No Buildroots |