Mon, 03 Mar 2025 20:19:31 UTC | login

Information for build vhd2vl-2.5-21.fc42

ID364044
Package Namevhd2vl
Version2.5
Release21.fc42
Epoch
Sourcegit+https://src.fedoraproject.org/rpms/vhd2vl.git#8cbfa5ea433f35ebcdd876bead8402bbf677dc79
SummaryVHDL to Verilog translator
Descriptionvhd2vl is a VHDL to Verilog translation program. It targets the translation of synthetisable RTL. While far from complete it supports a useful subset of VHDL, sufficient for complex designs.
Built bydavidlt
State complete
Volume DEFAULT
StartedMon, 03 Mar 2025 12:40:33 UTC
CompletedMon, 03 Mar 2025 14:19:18 UTC
Taskbuild (f42, /rpms/vhd2vl.git:8cbfa5ea433f35ebcdd876bead8402bbf677dc79)
Extra{'source': {'original_url': 'git+https://src.fedoraproject.org/rpms/vhd2vl.git#8cbfa5ea433f35ebcdd876bead8402bbf677dc79'}}
Tags
f42
RPMs
src
vhd2vl-2.5-21.fc42.src.rpm (info) (download)
riscv64
vhd2vl-2.5-21.fc42.riscv64.rpm (info) (download)
vhd2vl-debuginfo-2.5-21.fc42.riscv64.rpm (info) (download)
vhd2vl-debugsource-2.5-21.fc42.riscv64.rpm (info) (download)
Logs
riscv64
state.log
build.log
root.log
hw_info.log
mock_output.log
Changelog * Sun Jan 19 2025 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-21 - Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild * Fri Jul 26 2024 Miroslav Suchý <msuchy@redhat.com> - 2.5-20 - convert license to SPDX * Sat Jul 20 2024 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-19 - Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild * Sat Jan 27 2024 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-18 - Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild * Sat Jul 22 2023 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-17 - Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild * Sat Jan 21 2023 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-16 - Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild