Sat, 27 Apr 2024 14:01:55 UTC | login

Information for build iverilog-10_2-3.fc29

ID66631
Package Nameiverilog
Version10_2
Release3.fc29
Epoch
SummaryIcarus Verilog is a verilog compiler and simulator
DescriptionIcarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
Built bydavidlt
State complete
Volume DEFAULT
StartedWed, 01 Aug 2018 05:49:26 UTC
CompletedWed, 01 Aug 2018 10:00:37 UTC
Taskbuild (f29-candidate, iverilog-10_2-3.fc29.src.rpm)
Tags
f29
f30
f31
RPMs
src
iverilog-10_2-3.fc29.src.rpm (info) (download)
riscv64
iverilog-10_2-3.fc29.riscv64.rpm (info) (download)
iverilog-debuginfo-10_2-3.fc29.riscv64.rpm (info) (download)
iverilog-debugsource-10_2-3.fc29.riscv64.rpm (info) (download)
Logs
riscv64
build.log
hw_info.log
mock_output.log
root.log
state.log
Changelog * Fri Jul 13 2018 Fedora Release Engineering <releng@fedoraproject.org> - 10_2-3 - Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild * Tue Apr 10 2018 Filipe Rosset <rosset.filipe@gmail.com> - 10_2-2 - spec cleanup (thanks to Vasiliy N. Glazov <vascom2@gmail.com) * Mon Apr 09 2018 Filipe Rosset <rosset.filipe@gmail.com> - 10_2-1 - update to latest 10_2 upstream version + spec cleanup * Wed Feb 07 2018 Fedora Release Engineering <releng@fedoraproject.org> - 10-8 - Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild * Wed Aug 09 2017 Filipe Rosset <rosset.filipe@gmail.com> - 10-7 - rebuilt * Wed Aug 02 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-6 - Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Binutils_Mass_Rebuild * Wed Jul 26 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-5 - Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Mass_Rebuild * Fri Feb 10 2017 Fedora Release Engineering <releng@fedoraproject.org> - 10-4 - Rebuilt for https://fedoraproject.org/wiki/Fedora_26_Mass_Rebuild * Thu Jan 12 2017 Igor Gnatenko <ignatenko@redhat.com> - 10-3 - Rebuild for readline 7.x