Information for RPM vhd2vl-2.5-1.fc28.src.rpm
| ID | 22978 | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| Name | vhd2vl | ||||||||
| Version | 2.5 | ||||||||
| Release | 1.fc28 | ||||||||
| Epoch | |||||||||
| Arch | src | ||||||||
| Summary | VHDL to Verilog translator | ||||||||
| Description | vhd2vl is a VHDL to Verilog translation program. It targets the translation of synthetisable RTL. While far from complete it supports a useful subset of VHDL, sufficient for complex designs. | ||||||||
| Build Time | 2018-02-27 06:29:12 GMT | ||||||||
| Size | 55.33 KB | ||||||||
| bde0ad39193feb131bc26f48383a1c14 | |||||||||
| License | GPLv2+ | ||||||||
| Provides | No Provides | ||||||||
| Obsoletes | No Obsoletes | ||||||||
| Conflicts | No Conflicts | ||||||||
| Requires |
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| Recommends | No Recommends | ||||||||
| Suggests | No Suggests | ||||||||
| Supplements | No Supplements | ||||||||
| Enhances | No Enhances | ||||||||
| Files |
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| Component of | No Buildroots | ||||||||
