Information for RPM abc-1.01-19.git20181121.fc30.riscv64.rpm
| ID | 294759 | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | abc | ||||||||||||||||||||
| Version | 1.01 | ||||||||||||||||||||
| Release | 19.git20181121.fc30 | ||||||||||||||||||||
| Epoch | |||||||||||||||||||||
| Arch | riscv64 | ||||||||||||||||||||
| Summary | Sequential logic synthesis and formal verification | ||||||||||||||||||||
| Description | ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a toolbox rather than a complete tool. | ||||||||||||||||||||
| Build Time | 2018-12-03 14:18:37 GMT | ||||||||||||||||||||
| Size | 16.97 KB | ||||||||||||||||||||
| 2c15a8dffa88c9173c4bf124a3720eeb | |||||||||||||||||||||
| License | MIT | ||||||||||||||||||||
| Buildroot | f30-build-35575-19885 | ||||||||||||||||||||
| Provides |
|
||||||||||||||||||||
| Obsoletes | No Obsoletes | ||||||||||||||||||||
| Conflicts | No Conflicts | ||||||||||||||||||||
| Requires |
|
||||||||||||||||||||
| Recommends | No Recommends | ||||||||||||||||||||
| Suggests | No Suggests | ||||||||||||||||||||
| Supplements | No Supplements | ||||||||||||||||||||
| Enhances | No Enhances | ||||||||||||||||||||
| Files |
|
||||||||||||||||||||
| Component of | No Buildroots | ||||||||||||||||||||
